IGZO
wiz
Layout, schematic, extraction and simulation on the IGZO TFT process
Example
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Layout
Schematic
Tapeout
on the wafer
pending
free die
dicing street
cross
pad
Simulate
Devices
DRC
LVS
SPICE
Tapeout
About
Circuit
Extracted layout
Schematic
Output curves
Transfer
Transient
AC
Corner
Contact 2·Rc·W
Signals
Log scale
Simulate on every change
Simulate
Extracted layout
Schematic
netlist.spice
Copy
Download
ngspice output